A Low-Latency High-Order Arithmetic to Boolean Masking Conversion. IACR Transactions on Cryptographic Hardware and Embedded Systems, [S. l.], v. 2024, n. 2, p. 630–653, 2024. DOI: 10.46586/tches.v2024.i2.630-653. Disponível em: https://bmt.ub.rub.de/index.php/TCHES/article/view/11441.. Acesso em: 20 nov. 2024.